NCT7491
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Table 59. PECI T
MIN
 REGISTER (PowerOn Default = 0x80)
Register Address
R/W
Description
PowerOn Default
0x3B
R/W
PECI T
MIN
When the PECI measurement exceeds PECI T
MIN
 the appropriate fans run at
PWM
MIN
 and increase according to the automatic fan speed control slope.
If Absolute PECI mode is used then the maximum valid Tmin value is 175癈.
0xD6 (42癈)
Table 60. REGISTER 0x3C  PECI T
RANGE
  (PowerOn Default = 0xC0)
Bit
Name
R/W
1
Description
<2:0>
Reserved
R
< 3 >
Reserved
R
<7:4>
T
RANGE
R/W
These bits determine the PWM duty cycle vs. the PECI temperature range for automatic
fan control.
0000 = 2癈
0001 = 2.5癈
0010 = 3.33癈
0011 = 4癈
0100 = 5癈
0101 = 6.67癈
0110 = 8癈
0111 = 10癈
1000 = 13.33癈
1001 = 16癈
1010 = 20癈
1011 = 26.67癈
1100 = 32癈 (default)
1101 = 40癈
1110 = 53.33癈
1111 = 80癈
Table 61. PECI0 T
CONTROL
 LIMIT REGISTER (Note 17)
Register Address
R/W
Description
PowerOn Default
0x3D
R/W
PECI0 T
CONTROL
 limit.
0x00
17.If any PECI reading exceeds the T
CONTROL
 limit, all PWM outputs drive their fans at 100% duty cycle. This is a failsafe mechanism
incorporated to cool the system in the event of a critical overtemperature. It also ensures some level of cooling in the event that software
or hardware locks up. If set to 0x80, this feature is disabled. The PWM output remains at 100% until the temperature drops below T
CONTRO
limit  hysteresis.
Table 62. COMPANY ID REGISTER
Register Address
R/W
Description
PowerOn Default
0x3E
Read
Company ID
0x1A
Table 63. REGISTER 0x3F VERSION/REVISION REGISTER (PowerOnDefault = 0x6C)
Bit
Name
R/W
Description
<1:0>
REV
Read
These two bits indicate the NCT7491 silicon revision number. 0x00 indicates rev 0, 0x01 indic-
ates Rev 1 etc&
<2>
PECI
Read
This bit is set to 1 indicating that the NCT7491 supports the PECI interface
<3>
4 Wire
Read
This bit is set to 1 indicating that the NCT7491 may be configured to drive 4wire fans using high
frequency PWM.
<7:4>
VER
Read
These bits indicate the Heceta version number of the device.
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